Lithography is a well known field and includes both electron beam and photolithography. A typical application of lithography is for defining patterns onto photo or electron sensitive resist coated on a substrate The substrate is typically a semiconductor wafer or a reticle blank for semiconductor fabrication. The lithography process defines a pattern on the resist which is then developed and used for subsequent etching or other steps. Lithography includes using a reticle (mask) in which a beam of for instance light is directed through a mask which defines the pattern in order to image the pattern onto the substrate; and also scanning where a beam, for instance of electrons or light, is directed in a raster or vector scan onto the resist. The scanned beam is turned on and off in order to expose or not expose various portions of the resist.
In lithography an important goal is uniformity of each instance of an identical feature defined by the lithography process. The features are the elements imaged onto the substrate. There can be systematic variations in feature sizes that are determined by the feature's location on the substrate and which arise from a variety of causes. To simplify this description, it will refer to the feature as the critical dimension with the smallest tolerance for deviation from the designed value.
Sources of such systematic variations are, for instance, imperfections in the "optical" components (optical lenses or electrostatic/electromagnetic lenses) of the lithography machine ("tool") that contribute to the intra-field uniformity of features; resist sensitivity at different positions on a substrate caused for example by inhomogeneities of the baking process which typically occurs after exposure or after the application of resist; and radial inhomogeneities from variations in resist thickness and/or induced by process steps such as resist development or chrome etching. Since it is to be understood (see above) that scanning lithography is typically used not only to fabricate semiconductor devices by direct writing, but also to fabricate the reticles used in photolithography, the problems with such variations are essentially the same in both cases.
It is known that a reproducible low spatial frequency variation dependent on the substrate location in critical dimension features can be caused by the above described effects. After these low frequency "signatures" have been characterized, for instance by experimentation, it is possible to compensate for the resulting error in the image by modifying the pattern (image) data. This modifying the pattern data of course is only available in the beam write (scanning) lithography regime mentioned above, where the data is the information defining the pattern which is used to control the scanning. Unfortunately because the pattern data is generally not radially symmetric and the pattern grid (the raster or vector scan grid) is not commensurate with the systematic critical dimension variation, correction for such low frequency errors requires selecting a finer (smaller) data address grid. For a raster scan system, this causes the write times to increase proportionately to the inverse square of the ratio of the data address grids.
To better explain this, consider as an example a reproducible radial variation in critical dimensions observed experimentally from the center to the edge of a mask (for use in semiconductor fabrication) which is being written, for instance, by electron beam lithography. Assume the largest differences in critical dimensions observed from the radial variation are 50 nanometers (nm) the original data address grid (spacing between pixel which define the pattern) is 30 nm and the goal is to have no more than a 10 nm radial error in critical dimension features. To meet this average error criteria, the data would have to be refractured on a 10 nm grid, with the pattern data vertices adjusted appropriately to compensate for the radial effect. Ignoring the (additionally adverse) increase in the number of geometrical figures created by the radial perturbation to the pattern data the exposure time would increase nine (30 nm/10 nm).sup.2 times due to the reduction of the data address grid size alone.
In other words, it would take at least nine times longer to write such a mask given the finer address grid when compensating for a radial error. This very substantial reduction in throughput is undesirable since it increases fabrication cost proportionately. The reference to the geometrical figures is that typically physical features written on a mask are divided into a number of sub-shapes, for instance, squares, rectangles, etc. for ease of data processing. This further division would increase the number of figures required to describe all patterns which now depend on their location of the substrate. In other words, the data must be redescribed as a single pattern for the substrate.
This brute force approach to overcoming the above-mentioned systematic variations is not economical and hence unsatisfactory. It would be better to compensate for such errors without refracturing the data and therefore substantially increasing the fabrication time. It is to be understood that the technical problem here expressed in terms of patterning a mask also applies to direct writing of features on a wafer or other substrate.